Comparators are non-linear circuits that are generally used to detect the sign differences between two or more signals and have been used to resolve signals in a variety of applications, such as memory and analog-to-digital converters (ADCs). As an example, a sense amplifier 50 (which can, for example, function as a comparator for memory applications) is shown in FIG. 1. Specifically, this sense amplifier 50 is a CMOS circuit that functions as a regenerative, clocked comparator. It generally comprises cross-coupled PMOS and NMOS transistors Q2 to Q5, a differential input pair of NMOS transistors Q7 and Q8, and a clock circuit (which generally includes PMOS transistors Q1 and Q6 and NMOS transistor Q9). When the clock signal CLK is logic low or “0,” output terminals R and S can be precharged to the voltage on supply rail VDD and, when the clock signal CLK is logic high or “1,” the output values at terminals R and S are resolved based on the input values at input terminals INM and INP. If the voltage on input terminal INP is greater than the voltage on terminal INM, the terminals S and R resolve as “1” and “0,” respectively, and, conversely, when voltage on input terminal on INP is less than the voltage on terminal INM, the terminals S and R resolve as “0” and “1,” respectively. Additionally, transistor Q9 couples and decouples the differential pair Q7 and Q8 to ground (supply rail) based on the clock signal CLK.
A property used to describe the behavior of the sense amplifier 50 is its “time constant,” which indicates dependency of the propagation delay (or “clock to Q delay”) on the amplitude of the inputs. Typically, with a smaller the magnitude in the difference in voltage between terminals INM and INP, there is a longer delay to resolve the values on terminals R and S. This relationship between can be expressed as follows:TPROP=max(tFIXED, tFIXED−τ*1n(|VIN|)),   (1)where TPROP is the propagation delay, tFIXED is a fixed comparator delay related to (for example) process variation, temperature, and voltage on supply rail VDD, τ is a time constant, and |VIN| is the magnitude of the difference in voltage between terminals INM and INP (which is typically a differential signal). Usually, equation (1) holds for signals on the order of 100 mV or less, and, once the difference is sufficiently large, the propagation delay TPROP saturates to the fixed comparator delay tFIXED. Thus, for some applications, it is desirable to reduce this propagation delay TPROP to more quickly resolve comparison results for low amplitude signals.
Some examples of conventional systems are: U.S. Pat. Nos. 4,274,013; 4,604,533; 5,627,789; 5,901,088; 7,688,125; and Payandehnia et al., “A 4 mW 3-tap 10 Gb/s Decision Feedback Equalizer,” 2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), Sep. 23, 2011, pp. 1-4.